[Wsim-commits] r824 - arch/msp430 devices/cma3000_spi devices/scp1000_i2c

bernharddick at users.gforge.inria.fr bernharddick at users.gforge.inria.fr
Dim 11 Mar 23:46:28 CET 2012


Author: bernharddick
Date: 2012-03-11 23:46:27 +0100 (Sun, 11 Mar 2012)
New Revision: 824

Modified:
   arch/msp430/msp430_models.h
   arch/msp430/msp430_uscib.c
   arch/msp430/msp430_uscib.h
   devices/cma3000_spi/cma3000_spi_dev.c
   devices/scp1000_i2c/scp1000_i2c_dev.c
Log:
- added new uscib0 functionality of the cc430
- remove waiting in scp1000 and cma3000
- add uscib0 and cma3000 connectivity in ez430chronos platform



Modified: arch/msp430/msp430_models.h
===================================================================
--- arch/msp430/msp430_models.h	2012-01-04 15:04:51 UTC (rev 823)
+++ arch/msp430/msp430_models.h	2012-03-11 22:46:27 UTC (rev 824)
@@ -598,7 +598,6 @@
 
 #define __msp430_have_64_interrupts
 #define INTR_FIRST_NMI    61
-//#define INTR_FIRST_NMI    54
 #define INTR_BASE_IV_ADDR 0xFF80u
 
 // infomem
@@ -610,7 +609,7 @@
 
 //ucscia ucsib
 //#define __msp430_have_uscia0
-//#define __msp430_have_uscib0
+#define __msp430_have_uscib0
 
 // 8 bit blocks
 #define __msp430_have_portmap
@@ -630,6 +629,7 @@
 #define __msp430_have_pmm
 #define __msp430_have_rtc
 #define __msp430_have_new_sfr
+#define __msp430_have_new_uscib
 
 // Flash erase timings
 #define FLASH_WRITE_TIMING_BYTE       30

Modified: arch/msp430/msp430_uscib.c
===================================================================
--- arch/msp430/msp430_uscib.c	2012-01-04 15:04:51 UTC (rev 823)
+++ arch/msp430/msp430_uscib.c	2012-03-11 22:46:27 UTC (rev 824)
@@ -164,14 +164,21 @@
 		   MCU.uscib0.ucbxtx_shift_delay = 0;      
 		   MCU.uscib0.ucbxrx_slave_rx_done = 0;	      
 		 }
-              
-		MCU.sfr.ifg2.b.ucb0txifg  = 1;                                         
-		if (MCU.sfr.ie2.b.ucb0txie)                                 
-                 {                                                            
-                    msp430_interrupt_set(INTR_USCIX0_TX);           
-                 }   
+     
+#ifdef __msp430_have_new_uscib
+     MCU.uscib0.ucbxifg.b.uctxifg=1;
+     if(MCU.uscib0.ucbxie.b.uctxie) 
+     {
+       msp430_interrupt_set(INTR_USCIB0_RXTX);
+     }
+#else
+     MCU.sfr.ifg2.b.ucb0txifg  = 1;                                         
+		 if (MCU.sfr.ie2.b.ucb0txie)                                 
+     {                                                            
+        msp430_interrupt_set(INTR_USCIX0_TX);           
+     }   
+#endif
                  
-                 
                HW_DMSG_USCIB("msp430:uscib0: SPI tx buf -> shifter (%d)\n",  
 			     MCU.uscib0.ucbxtx_shift_delay);		      
 	       HW_SPY("msp430:uscib0: SPI send (0x%x,%c) at 0x%04x\n",   
@@ -263,12 +270,21 @@
           HW_DMSG_USCIB("msp430:uscib0: SPI rx shifter -> rx buf\n");    
 	  HW_SPY("msp430:uscib0: SPI receive (0x%x,%c)\n",	              
                   MCU.uscib0.ucbxrxbuf, isgraph(MCU.uscib0.ucbxrxbuf) ?	      
-                  MCU.uscib0.ucbxrxbuf : '.');	                              
+                  MCU.uscib0.ucbxrxbuf : '.');	   
+#ifdef __msp430_have_new_uscib
+          MCU.uscib0.ucbxifg.b.ucrxifg=1;
+          if(MCU.uscib0.ucbxie.b.ucrxie) 
+            {
+              msp430_interrupt_set(INTR_USCIB0_RXTX);
+            }
+#else
           MCU.sfr.ifg2.b.ucb0rxifg  = 1;                                     
           if (MCU.sfr.ie2.b.ucb0rxie)                                        
             {                                                                 
                msp430_interrupt_set(INTR_USCIX0_RX);                    
-            }                                                                 
+            }
+#endif
+          
         } /* shift ready */                                                   
     } /* urxe. spie */                                                        
     while (0);  
@@ -302,8 +318,12 @@
       HW_DMSG_USCIB("msp430:uscib0: read ucbxstat = 0x%02x\n",res & 0xff);  
       break;                                                                  
     case UCB0RXBUF :                                                 
-      res = MCU.uscib0.ucbxrxbuf;                                                
-      MCU.sfr.ifg2.b.ucb0rxifg   = 0;                                          
+      res = MCU.uscib0.ucbxrxbuf;
+#ifdef __msp430_have_new_uscib
+      MCU.uscib0.ucbxifg.b.ucrxifg=0;
+#else
+      MCU.sfr.ifg2.b.ucb0rxifg   = 0;
+#endif
       MCU.uscib0.ucbxrxbuf_full  = 0; 
       /*TRACER_TRACE_USCIB0(TRACER_USCIB0_IDLE);
       etracer_slot_event(ETRACER_PER_ID_MCU_SPI,
@@ -313,10 +333,20 @@
       HW_DMSG_USCIB("msp430:uscib0: read ucbxrxbuf = 0x%02x\n",res & 0xff);
       break;
     case UCB0TXBUF :                                                 
-      res = MCU.uscib0.ucbxtxbuf;                                                
-      MCU.sfr.ifg2.b.ucb0txifg = 0;                                          
+      res = MCU.uscib0.ucbxtxbuf;
+#ifdef __msp430_have_new_uscib
+      MCU.uscib0.ucbxifg.b.uctxifg=0;
+#else
+      MCU.sfr.ifg2.b.ucb0txifg = 0;
+#endif
       HW_DMSG_USCIB("msp430:uscib0: read ucbxtxbuf = 0x%02x\n",res & 0xff);
-      break;                                                                  
+      break;
+#ifdef __msp430_have_new_uscib
+      case UCB0IFG:
+          res = MCU.uscib0.ucbxifg.s;
+          HW_DMSG_USCIB("msp430:uscib0: read ucbxifg = 0x%02x\n",res & 0xff);
+          break;
+#endif
     default :                                                 
       res = 0;                                                                
       ERROR("msp430:uscib0: read bad address 0x%04x\n",addr);           
@@ -379,10 +409,16 @@
              /* reset  UCB0RXIE, UCB0TXIE, UCB0RXIFG, UCOE, and UCFE bits */            
              /* set    UCB0TXIFG flag                                     */           
              HW_DMSG_USCIB("msp430:uscib0:   swrst  = 1, reset flags\n");
+#if !defined(__msp430_have_new_sfr)
              MCU.sfr.ie2.b.ucb0rxie           = 0;                                 
              MCU.sfr.ie2.b.ucb0txie           = 0;                                 
              MCU.sfr.ifg2.b.ucb0rxifg         = 0; 
-	     MCU.sfr.ifg2.b.ucb0txifg         = 1; 
+             MCU.sfr.ifg2.b.ucb0txifg         = 1;
+#endif
+#ifdef __msp430_have_new_uscib
+             MCU.uscib0.ucbxifg.b.ucrxifg     = 0;
+             MCU.uscib0.ucbxifg.b.uctxifg     = 1;
+#endif
              MCU.uscib0.ucbxstat.b.ucoe       = 0;                                 
              MCU.uscib0.ucbxstat.b.ucfce      = 0;
              /* finishing current transaction */                              
@@ -450,8 +486,12 @@
         }                                                                     
       MCU.uscib0.ucbxtxbuf               = val;                                     
       MCU.uscib0.ucbxtxbuf_full          = 1;                                       
-      MCU.uscib0.ucbxtx_full_delay       = 1;                                   
-      MCU.sfr.ifg2.b.ucb0txifg           = 0;                                       
+      MCU.uscib0.ucbxtx_full_delay       = 1;          
+#ifdef __msp430_have_new_uscib
+      MCU.uscib0.ucbxifg.b.uctxifg       = 0;
+#else
+      MCU.sfr.ifg2.b.ucb0txifg           = 0;
+#endif
       /*TRACER_TRACE_USCIB0(TRACER_USCIB0_TX_RECV); 
       etracer_slot_event(ETRACER_PER_ID_MCU_USCIB0,                      
                            ETRACER_PER_EVT_WRITE_COMMAND,                     
@@ -469,8 +509,20 @@
 /* uscib0 chk ifg for MCU interrupt */
 int msp430_uscib0_chkifg()
 {
-  int ret = 0;                                                               
-   if (MCU.sfr.ifg2.b.ucb0txifg  && MCU.sfr.ie2.b.ucb0txie)                  
+  int ret = 0;    
+#ifdef __msp430_have_new_uscib
+  if(MCU.uscib0.ucbxie.b.uctxie & MCU.uscib0.ucbxifg.b.uctxifg) 
+    {
+      msp430_interrupt_set(INTR_USCIB0_RXTX);
+      ret = 1;
+    }
+  if(MCU.uscib0.ucbxie.b.ucrxie & MCU.uscib0.ucbxifg.b.ucrxifg) 
+    {
+      msp430_interrupt_set(INTR_USCIB0_RXTX);
+      ret = 1;
+    }
+#else
+  if (MCU.sfr.ifg2.b.ucb0txifg  && MCU.sfr.ie2.b.ucb0txie)                  
      {                                                                        
         msp430_interrupt_set(INTR_USCIX0_TX);                           
         ret = 1;                                                              
@@ -479,7 +531,8 @@
      {                                                                        
         msp430_interrupt_set(INTR_USCIX0_RX);                           
         ret = 1;                                                              
-     }                                                                        
+     }
+#endif
    return ret;
 }
 

Modified: arch/msp430/msp430_uscib.h
===================================================================
--- arch/msp430/msp430_uscib.h	2012-01-04 15:04:51 UTC (rev 823)
+++ arch/msp430/msp430_uscib.h	2012-03-11 22:46:27 UTC (rev 824)
@@ -69,7 +69,58 @@
 };
 #endif
 
-  
+#if defined(__msp430_have_new_uscib)
+
+#if defined(WORDS_BIGENDIAN)
+struct __attribute__ ((packed)) ucbxie_t {
+  uint8_t
+    reserved:6,
+    uctxie:1,
+    ucrxie:1;
+};
+#else
+struct __attribute__ ((packed)) ucbxie_t {
+  uint8_t
+    ucrxie:1,
+    uctxie:1,
+    reserved:6;
+};
+#endif
+
+#if defined(WORDS_BIGENDIAN)
+struct __attribute__ ((packed)) ucbxifg_t {
+  uint8_t
+    reserved:6,
+    uctxifg:1,
+    ucrxifg:1;
+};
+#else
+struct __attribute__ ((packed)) ucbxifg_t {
+  uint8_t
+    ucrxifg:1,
+    uctxifg:1,
+    reserved:6;
+};
+#endif
+
+#if defined(WORDS_BIGENDIAN)
+struct __attribute__ ((packed)) ucbxiv_t {
+  uint16_t
+    reserved:13,
+    ucivx:2,
+    reserved1:1;
+};
+#else
+struct __attribute__ ((packed)) ucbxiv_t {
+  uint16_t
+    reserved1:1,
+    ucivx:2,
+    reserved:13;
+};
+#endif
+
+#endif
+
 struct msp430_uscib_t
 {
   union {
@@ -84,6 +135,20 @@
     struct ucbxstat_t  b;
     int8_t             s;
   } ucbxstat;
+#if defined(__msp430_have_new_uscib)
+  union {
+    struct ucbxie_t  b;
+    int8_t             s;
+  } ucbxie;
+  union {
+    struct ucbxifg_t  b;
+    int8_t             s;
+  } ucbxifg;
+  union {
+    struct ucbxiv_t  b;
+    int16_t             s;
+  } ucbxiv;
+#endif
   
   uint8_t   ucbxbr0;
   uint8_t   ucbxbr1;
@@ -116,9 +181,28 @@
 /* ************************************************** */
 
 #if defined(__msp430_have_uscib0)
+#if defined(__msp430_have_new_uscib)
+
 #define USCIB0_START  USCIB_BASE
+#define USCIB0_END    USCIB_BASE + 0x1e
+
+#define UCB0CTL0     USCIB0_START + 0x01
+#define UCB0CTL1     USCIB0_START + 0x00
+#define UCB0BR0      USCIB0_START + 0x06
+#define UCB0BR1      USCIB0_START + 0x07
+#define UCB0STAT     USCIB0_START + 0x0a
+#define UCB0RXBUF    USCIB0_START + 0x0c
+#define UCB0TXBUF    USCIB0_START + 0x0e
+#define UCB0ICTL     USCIB0_START + 0x1c
+#define UCB0IE       USCIB0_START + 0x1c
+#define UCB0IFG      USCIB0_START + 0x1d
+#define UCB0IV       USCIB0_START + 0x1e
+
+#else
+
+#define USCIB0_START  USCIB_BASE
 #define USCIB0_END    USCIB_BASE+7
-
+ 
 #define UCB0CTL0     USCIB_BASE
 #define UCB0CTL1     USCIB_BASE+1
 #define UCB0BR0      USCIB_BASE+2
@@ -127,6 +211,8 @@
 #define UCB0RXBUF    USCIB_BASE+6
 #define UCB0TXBUF    USCIB_BASE+7
 
+#endif
+
 void   msp430_uscib0_create();
 void   msp430_uscib0_reset();
 void   msp430_uscib0_update();

Modified: devices/cma3000_spi/cma3000_spi_dev.c
===================================================================
--- devices/cma3000_spi/cma3000_spi_dev.c	2012-01-04 15:04:51 UTC (rev 823)
+++ devices/cma3000_spi/cma3000_spi_dev.c	2012-03-11 22:46:27 UTC (rev 824)
@@ -314,10 +314,13 @@
     CMA3000_SPI_DATA->got_data = 0;
   }
 
+  /*
+   never ready (did some strange things
   CMA3000_SPI_DATA->cycle_count++;
-  if (CMA3000_SPI_DATA->cycle_count == 100001) {
+  if (CMA3000_SPI_DATA->cycle_count == 10001) {
     CMA3000_SPI_DATA->INT_send = 1;
   }
+   */
   return 0;
 }
 

Modified: devices/scp1000_i2c/scp1000_i2c_dev.c
===================================================================
--- devices/scp1000_i2c/scp1000_i2c_dev.c	2012-01-04 15:04:51 UTC (rev 823)
+++ devices/scp1000_i2c/scp1000_i2c_dev.c	2012-03-11 22:46:27 UTC (rev 824)
@@ -101,7 +101,7 @@
     scp1000->SDA = ((value & SCP1000_I2C_SDA_MASK) == SCP1000_I2C_SDA_MASK) ? 1 : 0;
   }
 
-  HW_DMSG_DEV("scp1000 : SDA=0x%02x SCL=0x%02x \n", scp1000->SDA, scp1000->SCL);
+  //HW_DMSG_DEV("scp1000 : SDA=0x%02x SCL=0x%02x \n", scp1000->SDA, scp1000->SCL);
 }
 
 int scp1000_i2c_update(int dev)
@@ -283,10 +283,13 @@
   scp1000->SCL_last = scp1000->SCL;
   scp1000->SDA_last = scp1000->SDA;
 
+  /*
+   never ready (did some strange things
   scp1000->cycle_count++;
-  if (scp1000->cycle_count == 200000) { /* "ready" always 1000 cycles after pressure read */
+  if (scp1000->cycle_count == 1000) {
     scp1000->DRDY_send = 1;
   }
+   */
   return 0;
 }
 




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