[Wsim-commits] r827 - arch/msp430

bernharddick at users.gforge.inria.fr bernharddick at users.gforge.inria.fr
Lun 12 Mar 17:47:37 CET 2012


Author: bernharddick
Date: 2012-03-12 17:47:36 +0100 (Mon, 12 Mar 2012)
New Revision: 827

Modified:
   arch/msp430/msp430_models.h
   arch/msp430/msp430_uscia.c
   arch/msp430/msp430_uscia.h
Log:
- added new uscia0 functionality of the cc430


Modified: arch/msp430/msp430_models.h
===================================================================
--- arch/msp430/msp430_models.h	2012-03-12 14:05:34 UTC (rev 826)
+++ arch/msp430/msp430_models.h	2012-03-12 16:47:36 UTC (rev 827)
@@ -608,8 +608,10 @@
 #define __msp430_have_xt2
 
 //ucscia ucsib
-//#define __msp430_have_uscia0
+#define __msp430_have_uscia0
 #define __msp430_have_uscib0
+#define __msp430_have_new_uscia
+#define __msp430_have_new_uscib
 
 // 8 bit blocks
 #define __msp430_have_portmap
@@ -629,7 +631,6 @@
 #define __msp430_have_pmm
 #define __msp430_have_rtc
 #define __msp430_have_new_sfr
-#define __msp430_have_new_uscib
 #define __msp430_have_cc1101
 #if !defined(CC1100)
 #define CC1100
@@ -647,7 +648,6 @@
 #define FLASH_ERASE_TIMING_SEG      4819
 
 //BASE Register (OFFSET)
-#define USCIA_BASE        0x05d
 #define SFR_BASE          0x100
 #define PMM_BASE          0x120
 #define FLASHCTL_BASE     0x140
@@ -658,6 +658,7 @@
 #define TIMER_TA0_BASE    0x340
 #define TIMER_TA1_BASE    0x380
 #define RTC_BASE          0x4a0
+#define USCIA_BASE        0x5c0
 #define USCIB_BASE        0x5e0
 #define LCDB_BASE         0xa00
 

Modified: arch/msp430/msp430_uscia.c
===================================================================
--- arch/msp430/msp430_uscia.c	2012-03-12 14:05:34 UTC (rev 826)
+++ arch/msp430/msp430_uscia.c	2012-03-12 16:47:36 UTC (rev 827)
@@ -98,8 +98,28 @@
 void msp430_uscia0_create()
 {
   msp430_io_register_range8(USCIA0_START,USCIA0_END,msp430_uscia0_read,msp430_uscia0_write);
+#if defined(__msp430_have_new_uscia)
+  msp430_io_register_range16(USCIA0_START,USCIA0_END,msp430_uscia0_read16,msp430_uscia0_write16);
+#endif
 }
 
+#if defined(__msp430_have_new_uscia)
+int16_t msp430_uscia0_read16(uint16_t addr)
+  {
+    uint8_t upper = msp430_uscia0_read(addr);
+    uint8_t lower = msp430_uscia0_read(addr + 0x01);
+    return (upper << 8) | lower;
+  }
+
+void msp430_uscia0_write16(uint16_t addr, int8_t val)
+  {
+    uint8_t upper = (val & 0xff00) >> 8;
+    uint8_t lower = (val & 0x00ff);
+    msp430_uscia0_write(addr, upper);
+    msp430_uscia0_write(addr + 0x01, lower);
+  }
+#endif
+
 /* ************************************************** */
 /* ************************************************** */
 /* ************************************************** */
@@ -180,8 +200,16 @@
 		MCU.uscia0.ucaxtx_full_delay  = 0;                                
 		MCU.uscia0.ucaxtx_shift_empty = 0;                                
 		MCU.uscia0.ucaxtx_shift_ready = 0;                                
-		MCU.uscia0.ucaxtx_shift_delay = MCU.uscia0.ucaxbr_div;               
-		MCU.sfr.ifg2.b.uca0txifg = 1;                                
+		MCU.uscia0.ucaxtx_shift_delay = MCU.uscia0.ucaxbr_div;
+
+#ifdef __msp430_have_new_uscia
+                MCU.uscia0.ucaxifg.b.uctxifg=1;
+                if(MCU.uscia0.ucaxie.b.uctxie) 
+                  {
+                    msp430_interrupt_set(INTR_USCIA0_RXTX);
+                  }
+#else
+                MCU.sfr.ifg2.b.uca0txifg = 1;                                
 		if (MCU.sfr.ie2.b.uca0txie)                                   
 		  {                                                            
 		      msp430_interrupt_set(INTR_USCIX0_TX);               
@@ -189,7 +217,9 @@
 		else      
 		  {      
 		    DMA_SET_UTXIFG0();
-		  }		      
+		  }
+#endif
+				      
 		HW_DMSG_USCIA("msp430:uscia0: USCIA tx buf -> shifter (delay %d, val 0x%02x)\n", 
 			      MCU.uscia0.ucaxtx_shift_delay, MCU.uscia0.ucaxtxbuf);            
 		HW_SPY("msp430:uscia0: USCIA send (0x%x,%c)\n",            
@@ -252,7 +282,15 @@
 	    HW_DMSG_USCIA("msp430:uscia0: USCIA rx shifter -> rx buf\n");    
 	    HW_SPY("msp430:uscia0: USCIA receive (0x%x,%c)\n",               
 		    MCU.uscia0.ucaxrxbuf, isgraph(MCU.uscia0.ucaxrxbuf) ?              
-		    MCU.uscia0.ucaxrxbuf : '.');                                    
+		    MCU.uscia0.ucaxrxbuf : '.');  
+            
+#ifdef __msp430_have_new_uscia
+            MCU.uscia0.ucaxifg.b.ucrxifg=1;
+            if(MCU.uscia0.ucaxie.b.ucrxie) 
+              {
+                msp430_interrupt_set(INTR_USCIA0_RXTX);
+              }
+#else           
 	    MCU.sfr.ifg2.b.uca0rxifg  = 1; 
 	    
 	    if (MCU.sfr.ie2.b.uca0rxie)                                         
@@ -262,7 +300,9 @@
 	    else       
 	      {      
 		DMA_SET_URXIFG0();
-	      }      
+	      }
+#endif
+            
 	 } /* shift ready */  
 	  
     } while (0);
@@ -299,16 +339,24 @@
       HW_DMSG_USCIA("msp430:uscia0: read ucaxstat = 0x%02x\n", res & 0xff); 
       break;  
     case UCA0RXBUF      :                                                 
-      res = MCU.uscia0.ucaxrxbuf;                                                
-      MCU.sfr.ifg2.b.uca0rxifg   = 0;                                          
+      res = MCU.uscia0.ucaxrxbuf;
+#ifdef __msp430_have_new_uscia
+      MCU.uscia0.ucaxifg.b.ucrxifg=0;
+#else
+      MCU.sfr.ifg2.b.uca0rxifg   = 0;
+#endif
       MCU.uscia0.ucaxrxbuf_full  = 0;                                          
       /*TRACER_TRACE_USCIA(TRACER_USCIA_IDLE);*/
       MCU.uscia0.ucaxstat.b.ucoe = 0;                                          
       HW_DMSG_USCIA("msp430:uscia0: read ucaxrxbuf = 0x%02x\n", res & 0xff);
       break;                                                                  
     case UCA0TXBUF      :                                                 
-      res = MCU.uscia0.ucaxtxbuf;                                                
-      MCU.sfr.ifg2.b.uca0txifg = 0;                                          
+      res = MCU.uscia0.ucaxtxbuf;
+#ifdef __msp430_have_new_uscia
+      MCU.uscia0.ucaxifg.b.uctxifg=0;
+#else
+      MCU.sfr.ifg2.b.uca0txifg = 0;
+#endif
       HW_DMSG_USCIA("msp430:uscia0: read ucaxtxbuf = 0x%02x\n", res & 0xff);
       break;                                
     case UCA0ABCTL      :                                                 
@@ -323,6 +371,12 @@
       res = MCU.uscia0.ucaxirrctl.s;                                              
       HW_DMSG_USCIA("msp430:uscia0: read ucaxirrctl = 0x%02x\n", res & 0xff); 
       break;
+#ifdef __msp430_have_new_uscia
+      case UCA0IFG      :
+      res = MCU.uscia0.ucaxifg.s;
+      HW_DMSG_USCIB("msp430:uscia0: read ucaxifg = 0x%02x\n",res & 0xff);
+      break;
+#endif
     default             :
       res = 0;                                                                
       ERROR("msp430:uscia0: read bad address 0x%04x\n", addr);            
@@ -389,10 +443,16 @@
              /* reset  UCA0RXIE, UCA0TXIE, UCA0RXIFG, UCOE, and UCFE bits */            
              /* set    UCA0TXIFG flag                                     */           
              HW_DMSG_USCIA("msp430:uscia0:   swrst  = 1, reset flags\n");
+#if !defined(__msp430_have_new_sfr)
              MCU.sfr.ie2.b.uca0rxie           = 0;                                 
              MCU.sfr.ie2.b.uca0txie           = 0;                                 
              MCU.sfr.ifg2.b.uca0rxifg         = 0; 
 	     MCU.sfr.ifg2.b.uca0txifg         = 1; 
+#endif
+#ifdef defined(__msp430_have_new_uscia)
+             MCU.uscia0.ucaxifg.b.ucrxifg     = 0;
+             MCU.uscia0.ucaxifg.b.uctxifg     = 1;
+#endif
              MCU.uscia0.ucaxstat.b.ucoe       = 0;                                 
              MCU.uscia0.ucaxstat.b.ucfe       = 0;
              /* finishing current transaction */                              
@@ -483,7 +543,11 @@
 	  MCU.uscia0.ucaxtxbuf            = val;                                     
 	  MCU.uscia0.ucaxtxbuf_full       = 1;                                       
 	  MCU.uscia0.ucaxtx_full_delay    = 1; /* go to shifter after xx BITCLK */
+#ifdef __msp430_have_new_uscia
+          MCU.uscia0.ucaxifg.b.uctxifg    = 0;
+#else          
 	  MCU.sfr.ifg2.b.uca0txifg        = 0;
+#endif
 	  /*TRACER_TRACE_USCIA(TRACER_USCIA_TX_RECV);*/			     
 	  /* can be a dupe from the platform file */                            
 	  /*etracer_slot_event(ETRACER_PER_ID_MCU_USCIA,                    
@@ -557,7 +621,19 @@
 /* uscia0 chk ifg for MCU interrupt */
 int msp430_uscia0_chkifg()
 {
-   int ret = 0;                                                               
+   int ret = 0;
+#ifdef __msp430_have_new_uscia
+   if(MCU.uscia0.ucaxie.b.uctxie & MCU.uscia0.ucaxifg.b.uctxifg)
+     {
+       msp430_interrupt_set(INTR_USCIA0_RXTX);
+       ret = 1;
+     }
+   if(MCU.uscia0.ucaxie.b.ucrxie & MCU.uscia0.ucaxifg.b.ucrxifg)
+     {
+       msp430_interrupt_set(INTR_USCIA0_RXTX);
+       ret = 1;
+     }
+#else
    if (MCU.sfr.ifg2.b.uca0txifg  && MCU.sfr.ie2.b.uca0txie)                  
      {                                                                        
         msp430_interrupt_set(INTR_USCIX0_TX);                           
@@ -567,7 +643,8 @@
      {                                                                        
         msp430_interrupt_set(INTR_USCIX0_RX);                           
         ret = 1;                                                              
-     }                                                                        
+     }
+#endif
    return ret;
 }
 

Modified: arch/msp430/msp430_uscia.h
===================================================================
--- arch/msp430/msp430_uscia.h	2012-03-12 14:05:34 UTC (rev 826)
+++ arch/msp430/msp430_uscia.h	2012-03-12 16:47:36 UTC (rev 827)
@@ -153,8 +153,57 @@
 };
 #endif
 
+#if defined(__msp430_have_new_uscia)
 
+#if defined(WORDS_BIGENDIAN)
+struct __attribute__ ((packed)) ucaxie_t {
+  uint8_t
+    reserved:6,
+    uctxie:1,
+    ucrxie:1;
+};
+#else
+struct __attribute__ ((packed)) ucaxie_t {
+  uint8_t
+    ucrxie:1,
+    uctxie:1,
+    reserved:6;
+};
+#endif
 
+#if defined(WORDS_BIGENDIAN)
+struct __attribute__ ((packed)) ucaxifg_t {
+  uint8_t
+    reserved:6,
+    uctxifg:1,
+    ucrxifg:1;
+};
+#else
+struct __attribute__ ((packed)) ucaxifg_t {
+  uint8_t
+    ucrxifg:1,
+    uctxifg:1,
+    reserved:6;
+};
+#endif
+
+#if defined(WORDS_BIGENDIAN)
+struct __attribute__ ((packed)) ucaxiv_t {
+  uint16_t
+    reserved:13,
+    ucivx:2,
+    reserved1:1;
+};
+#else
+struct __attribute__ ((packed)) ucaxiv_t {
+  uint16_t
+    reserved1:1,
+    ucivx:2,
+    reserved:13;
+};
+#endif
+
+#endif
   
 struct msp430_uscia_t
 {
@@ -186,7 +235,21 @@
     struct ucaxirrctl_t  b;
     int8_t               s;
   } ucaxirrctl;
-
+#if defined(__msp430_have_new_uscia)
+  union {
+    struct ucaxie_t      b;
+    int8_t               s;
+  } ucaxie;
+  union {
+    struct ucaxifg_t     b;
+    int8_t               s;
+  } ucaxifg;
+  union {
+    struct ucaxiv_t      b;
+    int16_t              s;
+  } ucaxiv;
+#endif
+  
   uint8_t   ucaxbr0;
   uint8_t   ucaxbr1;
   uint8_t   ucaxrxbuf;
@@ -218,7 +281,32 @@
 /* ************************************************** */
 
 #if defined(__msp430_have_uscia0)
+#if defined(__msp430_have_new_uscia)
+
 #define USCIA0_START  USCIA_BASE
+#define USCIA0_END    USCIA_BASE + 0x1e
+
+#define UCA0CTL0      USCIA_BASE + 0x01
+#define UCA0CTL1      USCIA_BASE + 0x00
+#define UCA0BR0       USCIA_BASE + 0x06
+#define UCA0BR1       USCIA_BASE + 0x07
+#define UCA0MCTL      USCIA_BASE + 0x08
+#define UCA0STAT      USCIA_BASE + 0x0a
+#define UCA0RXBUF     USCIA_BASE + 0x0c
+#define UCA0TXBUF     USCIA_BASE + 0x0e
+#define UCA0ABCTL     USCIA_BASE + 0x10
+#define UCA0IRTCTL    USCIA_BASE + 0x12
+#define UCA0IRRCTL    USCIA_BASE + 0x13 
+#define UCA0IE        USCIA_BASE + 0x1c
+#define UCA0IFG       USCIA_BASE + 0x1d
+#define UCA0IV        USCIA_BASE + 0x1e
+
+int16_t msp430_uscia0_read16(uint16_t addr);
+void msp430_uscia0_write16(uint16_t UNUSED addr, int8_t UNUSED val);
+
+#else
+
+#define USCIA0_START  USCIA_BASE
 #define USCIA0_END    USCIA_BASE+10
 
 #define UCA0ABCTL     USCIA_BASE
@@ -232,6 +320,7 @@
 #define UCA0STAT      USCIA_BASE+8
 #define UCA0RXBUF     USCIA_BASE+9
 #define UCA0TXBUF     USCIA_BASE+10
+#endif
 
 
 void   msp430_uscia0_create();




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